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Index








| | Différents liens sur le Model-Checking
Pages Personnelles
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Alur, Rajeev (pubs) |
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Biere,
Armin |
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Clarke,
Edmund M. |
Courcoubetis,
Costas (pubs) |
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Dams,
Dennis (pubs) |
Diekert,
Volker (pubs) |
Dill, David L. |
Dwyer, Matthew (pubs) |
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Emerson,
E. Allen |
Esparza,
Javier (pubs) |
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Gastin,
Paul (pubs) |
Godefroid,
Patrice |
Gopalakrishnan,
Ganesh C. (pubs) |
Grumberg,
Orna (pubs) |
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Holzmann,
Gerard |
Hulgard, Henrik (pubs) |
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Jonsson, Bengt (pubs) |
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Kick, Alexander |
Kupferman,
Orna (pubs) |
Kwiatkowska,
Marta (pubs) |
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Larsen, Kim |
Lenzkes,
Dirk (pubs) |
Laroussinie, François
(pubs) |
Lee, Insup (pubs) |
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Maler,
Oded (pubs) |
Mitchell,
John C. (pubs) |
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Peled, Doron |
Petterson, Paul |
Pnueli,
Amir |
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Ramakrishna, Y.
S. (pubs) |
Raskin,
Jean-Francois |
Ruf, Jürgen |
Rushby,
John |
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Schlingloff,
Bernd-Holger (pubs) |
Schneider,
Klaus |
Schobbens,
Pierre-Yves |
Sistla, A.
Prasad (pubs) |
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Staunstrup, Jørgen
(pubs) |
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Valmari, Antti |
Vardi, Moshe (pubs) |
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Weise,
Carsten (pubs) |
Wolper,
Pierre (pubs) |
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Yovine,
Sergio |
Yi, Wang (pubs) |
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Zampuniéris,
Denis (pubs) |
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Outils universitaire
| SMV |
Symbolic Model Verifier (CTL) |
| BMC |
Bounded Model Checker |
| HyTech |
The HYbrid TECHnology Tool (Automates hybrides) |
| SPIN |
Simple Promela INterpreter (LTL) |
| Kronos |
Model chekcing temps réel (TCTL) |
| MONA |
MONAdic second-order logic |
| Murphi |
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| PEP |
Programming Environment based on Petri nets |
| PROD |
Pr/T-net reachability analysis tool (CTL + LTL) |
| RAVEN |
Real-time Analyzing and Verification ENvironment |
| TREAT |
Timed REachability Analysis Tool |
| TVS |
Transformation Verification Simulation |
| STeP |
Stanford Temporal Prover |
| SMC |
Symmetry based Model Checker (LTL) |
| UPPAAL |
Real-Time Model Checker |
| Verus |
specification and verification of real-time and other time
critical systems |
| vis |
Verification Interacting with Synthesis |
| FC2Tools |
process algebra theory |
| KIT |
Model-Checking Kit |
| Verisoft |
Lucent Technologies |
Outils commerciaux
Groupe de recherche
- Bell Labs, Murray Hill, USA, Formal
Methods at Bell Laboratories
- B User Group, BUG
- Formal Methods Europe, FME
- Basic Research in Computer Science, danemark,BRICS
- Carnegie Mellon University, USA, Model
Checking Group
- GMD, Germany, SYNCHRONIE,
Workbench for the design of synchronous systems
- GMD, Germany, VAN,
Verification and Analysis
- Helsinki University, Finland, Modelling
of Concurrency Group
- Stanford University, USA, Hardware
Verification Group
- Tampere University of Technology, Finland, Verification
Algorithm Research Group
- University of Karlsruhe, Germany, Hardware
Verification Group
Mailing lists
Liens divers
- Virtual library : formal
methods (Tous les liens sur les méthodes formelles)
- Virtual library : B
method (Tous les liens sur la methode B)
Cette page a été mise à jour le
20/08/09. |